STM32F4 clock configuration

__________________________Clocks______________________________

Clock sources :

* HSI  : High speed internal  16MHZ +/- 1% ( the Default clock )
* HSE : High speed external 8MHZ
* PLL : Phase locked loop    CLK times 2 to 16  ( multiplier )
* Secondary sources :  * LSI  : Low speed internal 32 KHZ watch dog timers clock
                                     * LSE : Low speed external 32;768 KHZ

Clocks:

system clock : the core clock                              max  168 MHZ
AHB  : Advanced high performance Bus            max  168 MHZ
APB1  : Low speed advanced peripheral Bus      max  42   MHZ
APB2  : High speed advanced peripheral Bus     max  84   MHZ


USB OTG FS
RNG  ( random number generator )
SDIO

I2S have their own internal clock : PLLI2S ; or ext source

MCO1 : output clk "PA8" from HSI, LSE, HSE, PLL /1 to 5
MCO2 : output clk "PC9" from HSE, PLL, PLLI2S, system clock  /1 to 5



use the config tool to generate "system_stm32f4xx.h"  include this file to have access to 3 functions :

SystemInit()  : apply the generated configs
SystemCoreClockUpdate
SetSystemClock()

 all clocks are disabled by default at startup.
use RCC->AHB1ENR to enable the clock of GPIO

the RCC is defined in  "stm32f4xx_rcc.h/c"

The RCC registers :

 

CR  (control register) :dis/enable /check clock sources.
CIR (interrupts ) : flags when clocks are ready.
CSR : flags
CFGR (clock configs ) : set switches and prescalers .
AHBxENR (clock enable ) : dis/enable clock for AHB.
APBxENR (clock enable ) : dis/enable clock for APB.
PLLGFGR (PLL config) : select source (ext/internal) and set NMPQ
DCKCFGR (PLL2-3 config)
SSCGR  spread spectrum config
AHB(1-3)RSTR  reset .
APB(1-2)RSTR  reset .
BDCR

AHB peripherals :

GPIO
USB OTG HS/FS
ETHERNET MAC
DMA1/2
RNG
HASH
CRYP
DCIM
FSMC

APB peripherals :

Timers (1-14)
USART (1-6)
UART (7-8)
I2C (1-3)
SPI (1-4)
CAN (1-2)
DAC
ADC
Watchdog
PWR
SDIO
LTDC


Clocks tree :

 Clock configuration tool

STM3F4 Discovery notes

use CoIDE (CooCox) ready to use and no hustle to setup and install gcc ARM

_________________________GPIO_______________________________

there are A,B,C,D,E,F, I ports each port has 16 bit  and each has a set of registers :

 - 4 config regs
 - 2 Data regs
 - 1 Set_Reset reg
 - 1 Locking reg
 - 2 Alternative function regs

1-Config regs : 

*GPIOx_MODER:  32bit , 2 bits for each pin  00 input/ 01 output/ 10 alter func/ 11 analog.
*GPIOx_OTYPER: 32bit , 1bit per pin (0 -15 ) 0 push-pull output / 1  open drain .
*GPIOx_OSPEEDR: 32bit , 2bits for each pin 00 2MHZ / 01 25MHZ / 10 50MHZ / 11 100-80MHZ.
*GPIOx_PUPDR: 32bit , 2 bit for each pin     00 N pull-push / 01 pullup / 10 pushdown /11 reserved

2-Data regs :

*GPIOx_IDR : 32bit , only 0-15 used
*GPIOx_ODR: 32bit , only 0-15 used

 3-Set/Reset reg:

*GPIOx_BSRR : 32  bit write only.    0-15 set reg    16-31   reset reg (manupilates ODR )

4-Lock reg:

*GPIOx_LCKR: 32 bit only 0-16 used.  0-15 port config lock ,  16 lock on/off  (has special sequence to enable )

5-Alternative functions reg:

*GPIOx_AFRH: 32 bit
*GPIOx_AFRL: 32 bit


all the reg's naming is defined under the ST library : "stm32f4xx.h" and "stm32f4xx_gpio.h"
you access the regs as follows : GPIOx->MODER

to config pins

GPIO_InitTypeDef GPIO_InitStructure;                                                          //structure to hold the configs

RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);        // enable the clock

GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12;                    // select the pins

GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;                                 // set the mode  in out ana alt

GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;                                 //  set the type pp od

GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;                          // set the speed

GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;                            // set pu pd resistors

GPIO_Init(GPIOD, &GPIO_InitStructure);                                                      // apply the structure to the desired port  & is used to keep other configs (no overwriting )

for manipulating the pins

GPIO_SetBits(GPIOD, GPIO_Pin_5);

GPIO_ResetBits(GPIOD, GPIO_Pin_12|GPIO_Pin_13|GPIO_Pin_14|GPIO_Pin_15 | GPIO_Pin_5);

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this is collected from blogs and official ST  docs

patrick leyman blog
STM32F4 docs